Principal Engineer, SoC NPU Architect

🏢 Samsungresearchamerica · 📍 665 Clyde Avenue, Mountain View, CA, USA 💰 $242,500 - $242,500 / yr

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Position Summary & Responsibilities

Lab Summary:

The Samsung SoC Architecture Lab explores innovative SoC architecture, key IP blocks (CPU, GPU, NPU), bus / memory subsystem and multimedia subsystems for future Samsung Galaxy products (Smartphones, IoT and future devices) echoing Samsung’s AI for All strategy. We are defining the high-performance SoC architecture development for various Galaxy device lineups. This lab collaborates with Samsung MX headquarter team, key R&D teams around the globe and Samsung's strategic SoC partners to innovate and reinvent technology that will positively impact hundred-millions of people around the world via the Galaxy flagship products.

Position Summary:

We are looking for a NPU Architect for next generation SOCs. This is a highly visible hands-on role leading individual and team contributions to NPU sub-system architecture, interface, performance and power tradeoffs. Responsible for anywhere from early-stage architectural exploration, research work focusing on machine learning, defining new features, performance modeling, Hardware-Software co optimization.

Position Responsibilities:

Propose innovative NPU Architectural and micro-architectural features to boost PPA (Performance, Power and Area) on various targeted workloads in next generation SOCs
Perform high-level performance modeling/simulation and analysis of NPU features, applications, benchmarks, and complex uses case
Develop cycle accurate and analytical NPU performance model and correlate with Silicon
Deliver architecture/microarchitecture proposals and specifications to the design team and articulate them effectively across audiences ranging from hardware & software engineers to architecture community peers, and to technology leadership
Analyzing benchmarks, application workloads, and performance simulation results for architecture and microarchitecture optimizations
Map AI use cases to NPU.
Optimize and co-design of SW and HW to develop new architectures for low power and high performance
Collaborate across teams to bring architecture proposals to fruition across the SOC, Driver, OS and System through detailed documentation

Required Skills:

Bachelor’s, Masters or PhD degree in Electrical, Computer Science, related Science or equivalent combination of education, training and experience

🎯 Candidate Preparation Guide For Samsungresearchamerica Applicants

Key Role Competencies & Evaluation Highlights

Key Role Focus:

Evaluating deep technical execution paired with the ability to bridge advanced R&D with scalable consumer or enterprise product applications.

📋 Preparation Priorities (Key Areas to Clarify):

1. Overly theoretical without an understanding of product timelines or market constraints.
2. Inflexibility when navigating ambiguous architectural or engineering requirements.
3. Lack of collaborative ethos or resistance to feedback from cross-functional teams.

✨ Recommended Role Alignment Hook:

I specialize in taking complex, zero-to-one R&D initiatives and translating them into robust, high-performance systems that scale globally.

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